In an Advanced-Super Dimensional Switching (AD-SDS, also known as ADS) technology, a multi-dimensional electric field is formed with both a parallel electric field produced at edges of pixel electrodes on the same plane and a vertical electric field produced between a pixel electrode layer and a common electrode layer, so that liquid crystal molecules at all orientations, which are located directly above the electrodes and between the pixel electrodes in a liquid crystal cell, can be rotated and aligned, which enhances the work efficiency of planar-oriented liquid crystals and increases light transmittance. The Advanced-Super Dimensional Switching technology can improve the picture quality of TFT-LCDs and has advantages of high transmittance, wide viewing angles, high opening ratio, low chromatic aberration, low response time, no push Mura, etc.
The ADS technology optimizes the liquid crystal material by means of electrodynamics and achieves a light efficiency of 90 percent of negative liquid crystals for positive liquid crystals, thereby solving the problem of low response time caused by the large viscosity of negative liquid crystals. Moreover, the ADS technology provides notable improvements in light transmittance, contrast ratio, brightness, viewing angle, chromatic aberration and so on.
In an ADS-mode display device, a black matrix (BM) for shielding light leaked from gate line (the light leakage is resulted from the local defects, i.e. “disinclination”, in alignment of liquid crystals) normally has a minimum width of 32 μm, such that light leakage of the gate line is reduced to the maximum extent while a relatively optimal aperture ratio for the pixel element may be obtained. Moreover, the aperture ratio is an important factor in determining the brightness and the power consumption of the display device—the higher the aperture ratio is, the higher the light transmittance is, therefore the brighter the screen will be, under the same backlight condition. Meanwhile, the power consumption of the backlight source in the LCD display takes up about 60% of the whole power output, therefore, a design with an aperture ratio as high as possible should be employed provided that the process conditions can be met, such that the power consumption of the backlight source may be minimized while the brightness requirement of the display device is met, thereby lowering the power consumption of the whole display system. However, in the ADS-mode display device, it needs to reduce the width of the BMs in order to improve the aperture ratio of the pixel element, which will lead to and exaggerate light leakage of the gate line.
An I-ADS mode display device with high transmittance is proposed for the purpose of improving the aperture ratio of the pixel element while reducing light leakage of the gate line. The difference between the I-ADS mode and ADS mode display devices lies in that the positions of the pixel electrode and the common electrode in the array substrate are inverted. That is, in the I-ADS mode array substrate, the array substrate is disposed as the first electrode (first ITO, that is the plate-like electrode) on the substrate and the common electrode is disposed as the second electrode (second ITO, that is a slit electrode) above the pixel electrode; while in the ADS mode array substrate, the common electrode is disposed as the first electrode on the substrate, and the pixel electrode is disposed as the second electrode above the common electrode.
FIG. 1(a) schematically illustrates a configuration of a conventional I-ADS mode array substrate and FIG. 1(b) is a cross section taken along A-A′ of FIG. 1(a). As illustrated in FIG. 1(b), the I-ADS mode array substrate comprises a substrate 104, a gate line 103 and a pixel electrode 101 disposed on the substrate 104, and a common electrode 102 disposed above and completely overlaying the gate line 103. Here, common electrode shielding effect is generated due to the common electrode 102 completely overlays the gate line 103, such that light leakage of the gate line is minimized, therefore the width of the BM for shielding light leaked from the gate line may be reduced, which helps to improve the aperture ratio of the pixel element. However, it is the common electrode completely overlaying the gate line that causes ratio of the gate electrode capacitance (C_gate) to increase and the line load of the gate line to increase, thereby causing a gate line delay and affecting the charge rate and charge efficiency of the display device.